发明名称 |
APPARATUS AND METHOD OF THREE DIMENSIONAL CONDUCTIVE LINES |
摘要 |
An apparatus and method of three dimensional conductive lines comprising a first memory column segment in a first tier, a second memory column segment in a second tier, and conductive lines connecting the first memory column segment to the second memory column segment. In some embodiments a conductive line is disposed in the first tier on a first side of the memory column and in the second tier on a second side of the memory column. |
申请公布号 |
US2017098596(A1) |
申请公布日期 |
2017.04.06 |
申请号 |
US201615379537 |
申请日期 |
2016.12.15 |
申请人 |
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. |
发明人 |
Lin Chih-Yu;Lin Kao-Cheng;Wang Li-Wen;Chen Yen-Huei |
分类号 |
H01L23/48;H01L27/10;G11C5/06;H01L25/065 |
主分类号 |
H01L23/48 |
代理机构 |
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代理人 |
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主权项 |
1. An inter-tier memory column, comprising:
a first segment disposed within a first tier of a three-dimensional integrated circuit (3D IC), the first segment comprising a first bit line disposed on a first side of a longitudinal axis, a first bit line bar disposed on a second side of the longitudinal axis, and a first plurality of memory cells, said first plurality of memory cells electrically connected to said first bit line and said first bit line bar; a second segment disposed within a second tier of the 3D IC, comprising a second bit line disposed on the second side of the longitudinal axis, a second bit line bar disposed on the first side of the longitudinal axis, and a second plurality of memory cells, said second plurality of memory cells electrically connected to said second bit line and said second bit line bar; and wherein said first bit line is electrically connected to said second bit line by a conductive member extending continuously from said first bit line to said second bit line, and said first bit line bar is electrically connected to said second bit line bar by a conductive member extending continuously from said first bit line bar to said second bit line bar. |
地址 |
Hsin-Chu TW |