SEMICONDUCTOR DEVICE INCLUDING SEMICONDUCTOR SUBSTRATE, SILICON CARBIDE SEMICONDUCTOR LAYER, UNIT CELLS, SOURCE, AND GATE

摘要

A semiconductor device includes a first silicon carbide semiconductor layer, a source including a source pad and a source wiring, a gate including a gate pad and a gate wiring, first unit cells disposed in a first element region, and second unit cells disposed in a second element region. In a plan view, the first and second element regions are adjacent to each other with the gate wiring between the first and second element regions. A first electrode including the gate electrode of each first unit cell is disposed in the first element region and electrically connected to the gate. A second electrode including the gate electrode of each second unit cell is disposed in the second element region and not electrically connected to the gate. The first and second electrodes are separated below the gate wiring.

主权项

1. A semiconductor device comprising:
a semiconductor substrate of a first conductivity type, having a first principal surface and a second principal surface; a first silicon carbide semiconductor layer of the first conductivity type, disposed on the first principal surface of the semiconductor substrate; unit cells; a source including a source pad and a source wiring extending from the source pad; and a gate including a gate pad and a gate wiring extending from the gate pad, wherein: each of the unit cells includes:
a body region of a second conductivity type, disposed in the first silicon carbide semiconductor layer;a source region of the first conductivity type, disposed in contact with the body region;a second silicon carbide semiconductor layer of the first conductivity type, disposed on the first silicon carbide semiconductor layer and in contact with at least part of the body region and at least part of the source region;a gate insulating layer disposed on the second silicon carbide semiconductor layer;a gate electrode disposed on the gate insulating layer and above the body region, the gate insulating layer and the second silicon carbide semiconductor layer being interposed between the gate electrode and the body region;a source electrode electrically connected to the source region and electrically connected to the source; anda drain electrode disposed on the second principal surface of the semiconductor substrate, the unit cells include first unit cells disposed in a first element region and second unit cells disposed in a second element region, and in a plan view, the first element region and the second element region are adjacent to each other with the gate wiring interposed between the first and second element regions, at least some of the first unit cells are disposed below one of the source pad and the source wiring, at least some of the second unit cells are disposed below another of the source pad and the source wiring, a first electrode including the gate electrode of each of the first unit cells is disposed in the first element region and electrically connected to the gate, a second electrode including the gate electrode of each of the second unit cells is disposed in the second element region and not electrically connected to the gate, and the first electrode and the second electrode are separated from each other below the gate wiring.