Memory controller, information processing apparatus, and method of controlling information processing apparatus

摘要

A memory controller is provided between a CPU and a main memory, controls access from the CPU to the main memory, and includes a data storage area and a controller. In a case where error information indicating that an error occurs is included in write data from the CPU to the main memory, the controller stores the write data in a data storage area in association with a writing destination address. Therefore, even in a case where the error information is not written in the main memory, the error information can be recorded.

主权项

1. A memory controller comprising:
a data storage area; and a first processor provided between a second processor and a main memory to control access from the second processor to the main memory and the first processor configured to store, when error information indicating that an error occurs is included in first write data from the second processor to the main memory, the first write data in the data storage area in association with a writing destination address of the first write data, the first write data stored in the data storage area includes a data portion which contains error occurrence cause information as the error information, and an error correcting code (ECC), in which a code indicating that the error occurs is embedded as the error information, for the data portion.