Hysteretic current mode buck-boost control architecture

摘要

A hysteretic current mode buck-boost voltage regulator including a buck-boost voltage converter, a switching controller, a window circuit, a ramp circuit, and a timing circuit. The timing circuit may be additional ramp circuits. The voltage converter is toggled between first and second switching states during a boost mode, is toggled between third and fourth switching states during a buck mode, and is sequentially cycled through each switching state during a buck-boost mode. The ramp circuit develops a ramp voltage that simulates current through the voltage converter, and switching is determined using the ramp voltage compared with window voltages provided by the window circuit. The window voltages establish frequency, and may be adjusted based on the input and output voltages. The timing circuit provides timing indications during the buck-boost mode to ensure that the second and fourth switching states have approximately the same duration to provide symmetry of the ramp signal.

主权项

1. An electronic device, comprising:
a hysteretic current mode buck-boost voltage regulator, comprising:
a buck-boost voltage converter for converting an input voltage to an output voltage as controlled by a switching controller that toggles said buck-boost voltage converter between first and second switching states in a boost regulation mode and that toggles said buck-boost voltage converter between third and fourth switching states in a buck regulation mode;a primary window circuit comprising a first voltage source that develops a first upper voltage above a regulation control voltage, a second voltage source that develops a first lower voltage below said regulation control voltage, wherein a difference between said first upper and first lower voltages forms a window voltage;a primary ramp circuit that provides a primary ramp voltage relative to said regulation control voltage, wherein said primary ramp voltage ramps up at a rate proportional to said input voltage in said first switching state, ramps down at a rate proportional to said output voltage in said third switching state, and ramps proportional to a difference between said input and output voltages in said second and fourth switching states;wherein during said buck-boost regulation mode, said switching controller transitions from said first switching state to said second switching state when said primary ramp voltage reaches said first upper voltage, transitions from said second switching state to said third switching state in response to a first timing indication, transitions from said third switching state to said fourth switching state when said primary ramp voltage reaches said first lower voltage, and transitions from said fourth switching state to said first switching state in response to a second timing indication; anda timing circuit that provides said first and second timing indications to said switching controller to ensure that said second and fourth switching states have approximately the same duration.