发明名称 Integrated circuits including modified liners and methods for fabricating the same
摘要 Integrated circuits and methods for fabricating integrated circuits are provided. In one example, a method for fabricating an integrated circuit includes contacting a liner that is disposed adjacent to a porous interlayer dielectric (ILD) layer of dielectric material with a selectively reactive gas at reaction conditions. A portion of the liner is reacted with the selectively reactive gas to form a converted expanded portion that is disposed between a remaining portion of the liner and the porous ILD layer.
申请公布号 US9613906(B2) 申请公布日期 2017.04.04
申请号 US201414311457 申请日期 2014.06.23
申请人 GLOBALFOUNDRIES, INC. 发明人 Ryan Errol Todd;Zhang Xunyuan
分类号 H01L21/768;H01L23/532 主分类号 H01L21/768
代理机构 Lorenz & Kopf, LLP 代理人 Lorenz & Kopf, LLP
主权项 1. A method for fabricating an integrated circuit, the method comprising: providing a liner on a porous interlayer dielectric (ILD) layer of dielectric material with a conductive metal fill overlying the liner and a protective cap overlying the conductive metal fill while leaving adjacent portions of the porous ILD layer that are adjacent to the protective cap exposed and having exposed surfaces; thereafter, contacting the liner that is disposed adjacent to the porous interlayer dielectric (ILD) layer of dielectric material with a selectively reactive gas at reaction conditions effective to react a portion of the liner with the selectively reactive gas to form a converted expanded portion that is disposed between a remaining portion of the liner and the porous ILD layer, wherein the exposed surfaces of the adjacent portions are exposed to the selectively reactive gas to contact the liner with the selectively reactive gas.
地址 Grand Cayman KY
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