发明名称 |
High speed receivers circuits and methods |
摘要 |
The present invention provides GPA embodiments. In some embodiments, a GPA stage with a negative capacitance unit is provided. |
申请公布号 |
US9614564(B2) |
申请公布日期 |
2017.04.04 |
申请号 |
US201615073943 |
申请日期 |
2016.03.18 |
申请人 |
Intel Corporation |
发明人 |
Chang Kevin;Giaconi Stefano |
分类号 |
H03F3/45;H04B1/16;H04B3/16 |
主分类号 |
H03F3/45 |
代理机构 |
Green, Howard & Mughal, LLP |
代理人 |
Green, Howard & Mughal, LLP |
主权项 |
1. An apparatus comprising:
a differential amplifier having a first transistor with a gate terminal to receive a first input signal, and a second transistor with a gate terminal to receive a second input signal; an offset cancellation circuit coupled to the differential amplifier; and a negative impedance circuit having a third transistor with a gate terminal coupled to a drain terminal of the first transistor, and a fourth transistor with a gate terminal coupled to the drain terminal of the second transistor. |
地址 |
Santa Clara CA US |