发明名称 Systems and methods generating inter-group and intra-group execution schedules for instruction entity allocation and scheduling on multi-processors
摘要 Systems and methods for instruction entity allocation and scheduling on multi-processors is provided. In at least one embodiment, a method for generating an execution schedule for a plurality of instruction entities for execution on a plurality of processing units comprises arranging the plurality of instruction entities into a sorted order and allocating instruction entities in the plurality of instruction entities to individual processing units in the plurality of processing units. The method further comprises scheduling instances of the instruction entities in scheduled time windows in the execution schedule, wherein the instances of the instruction entities are scheduled in scheduled time windows according to the sorted order of the plurality of instruction entities and organizing the execution schedule into execution groups.
申请公布号 US9612868(B2) 申请公布日期 2017.04.04
申请号 US201213665294 申请日期 2012.10.31
申请人 Honeywell International Inc. 发明人 Easwaran Arvind;Varadarajan Srivatsan
分类号 G06F9/46;G06F9/455;G06F9/48 主分类号 G06F9/46
代理机构 Fogg & Powers LLC 代理人 Fogg & Powers LLC
主权项 1. A system for scheduling a plurality of instruction entities on a plurality of processing units in a computing system, the system comprising: a memory unit configured to store schedule generation instructions and an execution schedule, wherein the execution schedule is a definition of when the plurality of instruction entities are available for execution on particular processing units in the plurality of processing units for the computing system and when the execution of the plurality of instruction entities should complete; and a generation processing unit coupled to the memory unit and configured to execute the schedule generation instructions, wherein the schedule generation instructions cause the generation processing unit to: generate an inter-group schedule, the inter-group schedule defining a temporal order for execution of a plurality of execution groups and execution duration for each execution group, wherein an execution group comprises a group of instruction entities in the plurality of instruction entities, wherein a first set of instruction entities in the group of instruction entities executes on a first processing unit in the plurality of processing units, wherein the group of instruction entities is constrained to execute within a respective execution duration, wherein the respective execution duration is comprised of a sum of processing budgets allotted to instruction entities in the first set of instruction entities and instruction entities in the plurality of instruction entities that are not part of the group of instruction entities are prevented from executing on processing units in the computing system during the execution of the group of instruction entities, wherein the instruction entities other than the first set of instruction entities in the execution group execute on a processing unit in the plurality of processing units other than the first processing unit; andgenerate an intra-group schedule, the intra-group schedule defining an execution priority for the instruction entities within execution groups, the intra-group schedule specifying an execution order between instruction entities in the group of instruction entities that execute on the same processing unit in the plurality of processing units; wherein the plurality of processing units executes instruction entities based on the inter-group schedule.
地址 Morris Plains NJ US