发明名称 Semiconductor memory apparatus and data processing method
摘要 A semiconductor memory apparatus is provided. The semiconductor memory apparatus does not require additional identification information to perform data scrambling and improves the reliability, where the identification information is used to identify whether it is an erased data or a programmed data. A flash memory of the present disclosure includes a scrambling unit 120 scrambling data between an input/output buffer 110 and a page buffer 160. The scrambling unit 120 includes a writing encoder 200 and a reading decoder 220. When an input data is equal to a predetermined bit string, the writing encoder 200 skips the scrambling of the input data. When a read data of the page buffer 160 is equal to the predetermined bit string, the reading decoder 220 skips the descrambling of the read data.
申请公布号 US9612753(B2) 申请公布日期 2017.04.04
申请号 US201514923452 申请日期 2015.10.27
申请人 Winbond Electronics Corp. 发明人 Sudo Naoaki
分类号 G06F3/06;G11C16/10;G11C7/10;G11C16/04;G11C16/26;G11C16/34 主分类号 G06F3/06
代理机构 Jianq Chyun IP Office 代理人 Jianq Chyun IP Office
主权项 1. A semiconductor memory apparatus, comprising: a memory array; a retaining unit, retaining data read from the memory array, or retaining data to be programmed to the memory array; an input unit, inputting data; and an encoding unit, when the data from the input unit is either a first predetermined bit string or a second predetermined bit string, providing the data from the input unit to the retaining unit, and when the data from the input unit is neither the first predetermined bit string nor the second predetermined bit string, scrambling the data from the input unit and providing the scrambled data to the retaining unit, wherein the first predetermined bit string is data when the memory array is erased, and wherein when the second predetermined bit string is scrambled by the encoding unit, the scrambled second predetermined bit string becomes the first predetermined bit string.
地址 Taichung TW
您可能感兴趣的专利