发明名称 Performing cache bank operations in offset sequences from first bank
摘要 In certain embodiments, methods and systems for multimedia data processing are provided. In an embodiment, a method for processing multimedia data includes defining one or more pixel block regions in a first cache so as to cache a plurality of reference pixel blocks corresponding to reference data. A reference pixel block from among the plurality of reference pixel blocks is assigned to a pixel block region from among the one or more pixel block regions based on a predetermined criterion. The reference pixel block is associated with a tag based on the pixel block region so as to facilitate a search of the reference data in order to process a plurality of pixel blocks associated with a multimedia frame of the multimedia data.
申请公布号 US9612962(B2) 申请公布日期 2017.04.04
申请号 US201414539526 申请日期 2014.11.12
申请人 Texas Instruments Incorporated 发明人 Sanghvi Hetul;Reddy Mullangi Venkata Ratna;Gupte Ajit Deepak;Basak Arindam
分类号 G06F13/28;G06F12/08;H04N19/433;H04N19/51;G06F12/0846 主分类号 G06F13/28
代理机构 代理人 Bassuk Lawrence J.;Brill Charles A.;Cimino Frank D.
主权项 1. A process of scheduling read and write operations of a cache memory comprising: (A) dividing the cache memory into plural banks; (B) scheduling data read and write operations in pipeline slots; (C) performing a first slot operation in a first sequence of the banks starting with a first bank, a second slot operation in the first sequence of the banks starting with the first bank and offset from the first sequence, and a third slot operation in the first sequence of the banks starting with the first bank and offset from the first and second sequences.
地址 Dallas TX US