发明名称 Nanowire transistor with underlayer etch stops
摘要 A nanowire device of the present description may be produced with the incorporation of at least one underlayer etch stop formed during the fabrication of at least one nanowire transistor in order to assist in protecting source structures and/or drain structures from damage that may result from fabrication processes. The underlayer etch stop may prevent damage to the source structures and/or drain the structures, when the material used in the fabrication of the source structures and/or the drain structures is susceptible to being etched by the processes used in the removal of the sacrificial materials, i.e. low selectively to the source structure and/or the drain structure materials, such that potential shorting between the transistor gate electrodes and contacts formed for the source structures and/or the drain structures may be prevented.
申请公布号 US9614060(B2) 申请公布日期 2017.04.04
申请号 US201615173890 申请日期 2016.06.06
申请人 Intel Corporation 发明人 Kim Seiyon;Aubertine Daniel;Kuhn Kelin;Murthy Anand
分类号 H01L29/06;H01L29/66;H01L29/78;H01L29/775;H01L29/423;H01L29/786;H01L29/10 主分类号 H01L29/06
代理机构 Winkle, PLLC 代理人 Winkle, PLLC
主权项 1. A method of fabricating a nanowire transistor, comprising: forming a fin structure having a first end and an opposing second end on a microelectronic substrate, wherein the fin structure comprises at least one sacrificial material layer alternating with at least one channel material layer; forming a first underlayer etch stop structure to abut the fin structure first end; forming a second underlayer etch stop structure to abut the fin structure second end; forming a source structure proximate the fin structure first end, wherein the first underlayer etch stop structure is disposed between the source structure and the fin structure first end and disposed between the entire source structure and the microelectronic substrate; and forming a drain structure proximate the fin structure second end, wherein the second underlayer etch stop structure is disposed between the drain structure and the at least one nanowire second end and disposed between the entire drain structure and the microelectronic substrate; and selectively removing the at least one sacrificial material layer from the fin structure, wherein the remain at least one channel material layer forms at least one channel nanowire.
地址 Santa Clara CA US