发明名称 |
Microelectronic package utilizing multiple bumpless build-up structures and through-silicon vias |
摘要 |
A microelectronic package having a first bumpless build-up layer structure adjacent an active surface and sides of a microelectronic device and a second bumpless build-up layer structure adjacent a back surface of the microelectronic device, wherein conductive routes are formed through the first bumpless build-up layer from the microelectronic device active surface to conductive routes in the second bumpless build-up layer structure and wherein through-silicon vias adjacent the microelectronic device back surface and extending into the microelectronic device are electrically connected to the second bumpless build-up layer structure conductive routes. |
申请公布号 |
US9613920(B2) |
申请公布日期 |
2017.04.04 |
申请号 |
US201514986542 |
申请日期 |
2015.12.31 |
申请人 |
Intel Corporation |
发明人 |
Goh Eng Huat;Teoh Hoay Tien |
分类号 |
H01L23/00;H01L21/50;H01L23/48;H01L23/29;H01L23/538;H01L21/768;H01L23/31 |
主分类号 |
H01L23/00 |
代理机构 |
Winkle, PLLC |
代理人 |
Winkle, PLLC |
主权项 |
1. A microelectronic package, comprising:
a microelectronic device having an active surface and an opposing back surface, and at least one through-silicon via extending into the microelectronic device from the microelectronic device back surface; a first bumpless build-up layer structure formed adjacent the active surface and at least one side of the microelectronic device, wherein the first bumpless build-up layer structure includes a first surface proximate the microelectronic device active surface and a second surface on the same plane with the microelectronic device back surface; and a second bumpless build-up layer structure formed adjacent the microelectronic device back surface and abutting the first bumpless build-up layer structure second surface. |
地址 |
Santa Clara CA US |