Method for forming electroless metal through via

摘要

A method of making a substrate-through metal via having a high aspect ratio, in a semiconductor substrate, and a metal pattern on the substrate surface, includes providing a semiconductor substrate (wafer) and depositing poly-silicon on the substrate. The poly-silicon on the substrate surface is patterned by etching away unwanted portions. Then, Ni is selectively deposited on the poly-silicon by an electroless process. A via hole is made through the substrate, wherein the walls in the hole is subjected to the same processing as above. Cu is deposited on the Ni by a plating process. Line widths and spacings <10 μm are provided on both sides of the wafer.

主权项

1. A method of making a substrate-through metal via having a high aspect ratio, in a semiconductor substrate, and a metal pattern on the substrate surface, comprising:
a) providing a semiconductor substrate (wafer); b) depositing poly-silicon on the substrate; c) patterning the poly-silicon on the substrate surface; d) selectively depositing Ni on the patterned poly-silicon by an electroless process, and e) providing an intermediate barrier layer of silicide SixNiy by silicidation of the deposited Ni through annealing; making a via hole through the substrate, wherein the walls in the hole is subjected to the same processing as in steps b)-d); depositing Cu on the Ni by a plating process.