| 主权项 |
1. A semiconductor package, comprising:
a top package comprising:
a substrate having a first side, a first plurality of contact pads on the first side, a second side opposing the first side, and a second plurality of contact pads on the second side;one or more dies on the first side of the substrate and electrically coupled to the first plurality of contact pads; anda first molding layer on the first side of the substrate and around the one or more dies; a bottom package comprising:
a first die;a first redistribution layer (RDL) on a first side of the first die, the first RDL having a fan-out interconnect structure;a second RDL on a second side of the first die opposing the first side of the first die;a second molding layer between the first RDL and the second RDL, wherein the second molding layer surrounds the first die; anda via in the second molding layer, the via being electrically coupled to the first RDL and the second RDL; a plurality of inter-package connectors located inside a gap between the second side of the substrate and the second RDL of the bottom package, the plurality of inter-package connectors extending from the second plurality of contact pads of the top package to corresponding redistribution contact pads in the second RDL of the bottom package; and an electrically conductive protection layer over exterior surfaces of the semiconductor package, wherein the electrically conductive protection layer seals the gap around its perimeter without physically contacting the inter-package connectors, wherein the electrically conductive protection layer contacts an upper surface of the first molding layer distal the substrate, sidewalls of the first molding layer, and sidewalls of the substrate, and wherein the electrically conductive protection layer contacts portions of an upper surface of the bottom package that extend beyond a boundary of the top package, and contacts sidewalls of the second RDL of the bottom package. |
