发明名称 |
Semiconductor ESD protection device |
摘要 |
A semiconductor device includes high-voltage (HV) and low-voltage (LV) MOS's formed in a substrate. The HV MOS includes a first semiconductor region having a first-type conductivity and a first doping level, a second semiconductor region having the first-type conductivity and a second doping level lower than the first doping level, a third semiconductor region having a second-type conductivity, and a fourth semiconductor region having the first-type conductivity. The first, second, third, and fourth semiconductor regions are arranged along a first direction, and are drain, drift, channel, and source regions, respectively, of the HV MOS. The LV MOS includes the fourth semiconductor region, a fifth semiconductor region having the second-type conductivity, and a sixth semiconductor region having the first-type conductivity. The fourth, fifth, and sixth semiconductor regions are arranged along a second direction different from the first direction, and are drain, channel, and source regions, respectively, of the LV MOS. |
申请公布号 |
US9613952(B2) |
申请公布日期 |
2017.04.04 |
申请号 |
US201414341295 |
申请日期 |
2014.07.25 |
申请人 |
Macronix International Co., Ltd. |
发明人 |
Chen Hsin-Liang;Chan Wing-Chor;Wu Shyi-Yuan |
分类号 |
H01L27/02;H01L27/088;H01L29/78;H01L21/8234 |
主分类号 |
H01L27/02 |
代理机构 |
Finnegan, Henderson, Farabow, Garrett & Dunner LLP |
代理人 |
Finnegan, Henderson, Farabow, Garrett & Dunner LLP |
主权项 |
1. A semiconductor device comprising:
a substrate; a high-voltage (HV) metal-on-semiconductor (MOS) structure formed in the substrate, the HV MOS structure including:
a first semiconductor region having a first-type conductivity and a first doping level, the first semiconductor region being a drain region of the HV MOS structure;a second semiconductor region having the first-type conductivity and a second doping level lower than the first doping level, the second semiconductor region being a drift region of the HV MOS structure;a third semiconductor region having a second-type conductivity, the third semiconductor region being a channel region of the HV MOS structure; anda fourth semiconductor region having the first-type conductivity, the fourth semiconductor region being a source region of the HV MOS structure,wherein the first, second, third, and fourth semiconductor regions are arranged along a first direction in this order; a low-voltage (LV) MOS structure formed in the substrate, the LV MOS structure including:
a fifth semiconductor region having the second-type conductivity, the fifth semiconductor region being a channel region of the LV MOS structure; anda sixth semiconductor region having the first-type conductivity, the sixth semiconductor region being a source region of the LV MOS structure,wherein:
the fourth semiconductor region is a drain region of the LV MOS structure, andthe fourth, fifth, and sixth semiconductor regions are arranged along a second direction different from the first direction in this order. |
地址 |
Hsinchu TW |