Read disturb and data retention handling for NAND devices

摘要

Systems, methods, and apparatus are herein disclosed for reducing read disturb and data retention errors in FLASH memory devices designed for long lifespans, such as greater than 10 or 15 years. Read disturb errors can be reduced by maintaining a read counter stored in a volatile memory and a FASTMAP memory block of the FLASH memory. When the read counter meets a threshold, then the associated memory block can be scheduled for scrubbing. Data retentions errors can be reduced by maintaining a last-erase timestamp in metadata of each memory block of a FLASH memory. When the last-erase timestamp associated with a given memory block meets a threshold, then the memory block can be scheduled for scrubbing.

主权项

1. A FLASH memory device comprising:
a plurality of memory blocks each having a metadata section; a FASTMAP memory block; a read counter module comprising:
a counter module that increments a read counter value when a read operation is performed on a one of the plurality of memory blocks;a backup module that periodically copies the read counter value to the FASTMAP memory block;a reset module that resets the read counter value when an erase operation is performed on the one of the memory blocks; a last-erase timestamp module that updates a last-erase timestamp in a metadata section of the one of the memory blocks every time that an erase operation is performed on the one of the memory blocks; a move and erase module comprising:
a read counter scrubbing scheduler that schedules data stored in the one of the memory blocks to be moved and then the one of the memory blocks to be erased when the read counter reaches a first threshold;a last-erase timestamp scrubbing scheduler that schedules data stored in the one of the memory blocks to be moved and then the one of the memory blocks to be erased when the last-erase timestamp exceeds a second threshold.