发明名称 Method and apparatus to shutdown a memory channel
摘要 A method is described that includes deciding to enter a lower power state, and, shutting down a memory channel in a computer system in response where thereafter other memory channels in the computer system remain active so that computer remains operative while the memory channel is shutdown.
申请公布号 US9612649(B2) 申请公布日期 2017.04.04
申请号 US201113997999 申请日期 2011.12.22
申请人 Intel Corporation 发明人 Nachimuthu Murugasamy K.;Kumar Mohan J.
分类号 G06F1/26;G06F1/32;G06F12/08;G06F12/0804;G06F12/0802;G06F12/1027 主分类号 G06F1/26
代理机构 Blakely, Sokoloff, Taylor & Zafman LLP 代理人 Blakely, Sokoloff, Taylor & Zafman LLP
主权项 1. A method, comprising: performing the following in response to a desire to enter into a lower performance state: migrating cache lines stored on a dynamic random access memory (DRAM) memory channel into other DRAM memory channels and active non volatile system memory, said active non volatile system memory being accessible at cache line granularity and from which software program code is able to directly execute out of, where, those of said cache lines associated with more frequently used virtual addresses are migrated into said other DRAM memory channels, and, those of said cache lines associated with less frequently used virtual addresses are migrated into said active non volatile system memory; and,shutting down said DRAM memory channel.
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