发明名称 Method of manufacturing semiconductor device
摘要 In an embodiment of the present disclosure, a method of manufacturing a semiconductor device may include forming a pattern group on a substrate, the substrate being divided into first and second regions, each pattern including a silicon layer, forming an insulating pattern on the substrate, the insulating pattern partially exposing the silicon layer on the first region and blocking the silicon layer on the second region, converting the exposed silicon layer on the first region to a silicide layer while the blocked silicon layer on the second region is protected from the conversion, and performing a subsequent process using, as an overlay vernier, at least a portion of the pattern group formed on the second region.
申请公布号 US9613972(B1) 申请公布日期 2017.04.04
申请号 US201615080700 申请日期 2016.03.25
申请人 SK HYNIX INC. 发明人 Kim Jong Hoon
分类号 H01L27/146;H01L27/11524;H01L21/28;H01L21/3205;H01L21/311;H01L21/3213;H01L21/3105 主分类号 H01L27/146
代理机构 William Park & Associates Ltd. 代理人 William Park & Associates Ltd.
主权项 1. A method of manufacturing a semiconductor device, comprising: forming a pattern group on a substrate, the substrate being divided into first and second regions, each pattern including a silicon layer; forming an insulating layer over the substrate to cover the pattern group, wherein a deposition thickness of the insulating layer on the second region is larger than that of the insulating layer on the first region; forming an insulating pattern by etching the insulating layer, the insulating pattern partially exposing the silicon layer on the first region and blocking the silicon layer on the second region; converting the exposed silicon layer on the first region to a silicide layer while the blocked silicon layer on the second region is protected from the conversion; and performing a subsequent process using, as an overlay vernier, at least a portion of the pattern group formed on the second region.
地址 Icheon-Si KR