发明名称 |
RADIO COMMUNICATION DEVICE AND RADIO COMMUNICATION METHOD |
摘要 |
According to one embodiment, a radio communication device 1 includes a variable frequency divider 17 that divides a frequency of a reference clock REFCLK and outputs a frequency divided clock DCLK; a controller 15 that controls a frequency dividing ratio of the variable frequency divider 17 so that an integral multiple of a frequency of the frequency divided clock DCLK is not included in a frequency band of a high-frequency signal that has been received from outside by radio; and a DCDC converter 18 that performs a switching operation in synchronization with the frequency divided clock DCLK to generate an output voltage Vout obtained by stepping down an input voltage Vin. |
申请公布号 |
US2017094596(A1) |
申请公布日期 |
2017.03.30 |
申请号 |
US201615232152 |
申请日期 |
2016.08.09 |
申请人 |
Renesas Electronics Corporation |
发明人 |
KIJIMA Kazuhiro;NAITO Wataru |
分类号 |
H04W52/02;H03L7/185;H04B1/16 |
主分类号 |
H04W52/02 |
代理机构 |
|
代理人 |
|
主权项 |
1. A radio communication device comprising:
a variable frequency divider that divides a frequency of a reference clock and outputs a frequency divided clock; a controller that controls a frequency dividing ratio of the variable frequency divider so that an integral multiple of a frequency of the frequency divided clock is not included in a frequency band of a high-frequency signal that has been received from outside by radio; and a DCDC converter that performs a switching operation in synchronization with the frequency divided clock to generate an output voltage obtained by stepping down an input voltage. |
地址 |
Tokyo JP |