FAST FOURIER TRANSFORM (FFT) CUSTOM ADDRESS GENERATOR

摘要

An apparatus and method for Fast Fourier Transform (FFT) address generation is disclosed. The apparatus may include a counter circuit and circuitry configured to load an initial value into a counter circuit. The circuitry may be further configured to generate first and second output values by formatting a current value of the counter, and increment the current value of the counter circuit by an increment value to generate a next value. The circuitry may also be configured to modify the increment value in response to a determination that the next value is equal to a target value.

主权项

1. An apparatus, comprising:
a plurality of registers; and circuitry coupled to the plurality of registers, wherein the circuitry is configured to:
set a count value to an initial value;format the count value to generate a first output value and a second output value, wherein the first output value and the second output value correspond to addresses used to access memory locations in a pattern according to execution of a Fast Fourier Transform (FFT) algorithm;increment the count value by an increment value to generate a next count value;re-set the count value to the initial value, in response to a determination that a processing stage of an FFT operation has completed; andmodify the increment value in response to the determination that the processing stage of the FFT operation has completed.