发明名称 |
METHOD FOR PRODUCING A SEMICONDUCTOR POWER DEVICE (DMOS) INCLUDING GATE ELECTRODE FORMED OVER A GATE INSULATION FILM HAVING SiO2 PORTIONS AND A HIGH-K PORTION THEREBETWEEN |
摘要 |
A method for producing a semiconductor power device, includes forming a gate trench from a surface of a semiconductor layer toward an inside thereof. A first insulation film is formed on an inner surface of the gate trench. The method also includes removing a part on a bottom surface of the gate trench in the first insulation film. A second insulation film having a dielectric constant higher than SiO2 is formed in such a way as to cover the bottom surface of the gate trench exposed by removing the first insulation film. |
申请公布号 |
US2017092743(A1) |
申请公布日期 |
2017.03.30 |
申请号 |
US201615261830 |
申请日期 |
2016.09.09 |
申请人 |
ROHM CO., LTD. |
发明人 |
OKUMURA Keiji;MIURA Mineo;NAKANO Yuki;KAWAMOTO Noriaki;ABE Hidetoshi |
分类号 |
H01L29/66;H01L29/78;H01L21/311;H01L29/423;H01L21/02 |
主分类号 |
H01L29/66 |
代理机构 |
|
代理人 |
|
主权项 |
1. A method for producing a semiconductor power device, the semiconductor power device having a semiconductor layer and a trench-gate type transistor structure formed in the semiconductor layer, the trench-gate type transistor structure comprising: a first conductivity type source region; a second conductivity type body region contiguous to the source region; a first conductivity type drift region contiguous to the body region; a gate trench formed in such a way as to straddle the source region, the body region, and the drift region; a gate insulation film formed on an inner surface of the gate trench; and a gate electrode facing the body region with the gate insulation film therebetween, the method comprising:
a step of forming the gate trench from a surface of the semiconductor layer toward an inside thereof; a step of forming a first insulation film on the inner surface of the gate trench; a step of removing a part on a bottom surface of the gate trench in the first insulation film; and a step of forming a second insulation film having a dielectric constant higher than SiO2 in such a way as to cover the bottom surface of the gate trench exposed by removing the first insulation film. |
地址 |
Kyoto JP |