发明名称 EPITAXIAL SOURCE REGION FOR UNIFORM THRESHOLD VOLTAGE OF VERTICAL TRANSISTORS IN 3D MEMORY DEVICES
摘要 An alternating stack of insulating layers and sacrificial material layers are formed over a substrate. Memory stack structures are formed through the alternating stack. A backside trench is formed and the sacrificial material layers are replaced with electrically conductive layers. After formation of an insulating spacer in the trench, an epitaxial pedestal structure is grown from a semiconductor portion underlying the backside trench. A source region is formed by introducing dopants into the epitaxial pedestal structure and an underlying semiconductor portion during and/or after epitaxial growth. Alternatively, the backside trench can be formed concurrently with formation of memory openings. An epitaxial pedestal structure can be formed concurrently with formation of epitaxial channel portions at the bottom of each memory opening. After formation and subsequent removal of a dummy trench fill structure in the backside trench, a source region is formed by introducing dopants into the epitaxial pedestal structure.
申请公布号 US2017092654(A1) 申请公布日期 2017.03.30
申请号 US201514867351 申请日期 2015.09.28
申请人 SANDISK TECHNOLOGIES INC. 发明人 NISHIKAWA Masatoshi;SAKAKIBARA Kiyohiko;OGAWA Hiroyuki;MINAGAWA Shuji
分类号 H01L27/115;H01L29/417;H01L29/16;H01L29/66;H01L29/788;H01L21/02;H01L21/265;H01L29/08;H01L29/04 主分类号 H01L27/115
代理机构 代理人
主权项 1. A three-dimensional memory device comprising: an alternating stack of insulating layers and electrically conductive layers and located over a substrate; memory stack structures extending through the alternating stack; and a source region comprising a substrate source portion located in the substrate and an epitaxial pedestal source portion overlying, and in epitaxial alignment, with the substrate source portion.
地址 PLANO TX US
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