发明名称 |
PROGRAMMABLE ON-DIE TERMINATION TIMING IN A MULTI-RANK SYSTEM |
摘要 |
On-die termination (ODT) control enables programmable ODT latency settings. A memory device can couple to an associated memory controller via one or more buses shared by multiple memory devices organized ranks of memory. The memory controller generates a memory access command for a target rank. In response to the command, memory devices can selectively engage ODT for the memory access operation based on being in the target rank or a non-target rank, and based on whether the access command includes a Read or a Write. The memory device can engage ODT in accordance with a programmable ODT latency setting. The programmable ODT latency setting can set different ODT timing values for Read and Write transactions. |
申请公布号 |
WO2017052853(A1) |
申请公布日期 |
2017.03.30 |
申请号 |
WO2016US47511 |
申请日期 |
2016.08.18 |
申请人 |
INTEL CORPORATION |
发明人 |
BAINS, Kuljit;KOSTINSKY, Alexey;BONEN, Nadav |
分类号 |
G11C7/10 |
主分类号 |
G11C7/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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