发明名称 |
SHUNT OF P-GATE TO N-GATE BOUNDARY RESISTANCE FOR METAL GATE TECHNOLOGIES |
摘要 |
An integrated circuit includes a component with a metal gate NMOS transistor and a metal gate PMOS transistor in which a metal gate structure of the NMOS transistor is disposed in electrical series with, and abuts, a metal gate structure of the PMOS transistor. A gate shunt is formed over a boundary between the metal gate structure of the NMOS transistor and the metal gate structure of the PMOS transistor. The gate shunt provides a low resistance connection between the metal gate structure of the NMOS transistor and the metal gate structure of the PMOS transistor. The gate shunt is free of electrical connections to other components through interconnect elements of the integrated circuit. |
申请公布号 |
EP3146565(A1) |
申请公布日期 |
2017.03.29 |
申请号 |
EP20150796561 |
申请日期 |
2015.05.20 |
申请人 |
Texas Instruments Incorporated |
发明人 |
LYTLE, Steve;NANDAKUMAR, Mahalingam |
分类号 |
H01L27/092;H01L21/8238 |
主分类号 |
H01L27/092 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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