发明名称 Graphics processing systems
摘要 A tile-based graphics processing pipeline comprising a rasteriser 3, a renderer 6, a tile buffer 10 configured to store rendered fragment data locally to the graphics processing pipeline prior to that data being written out to an external memory, a write out stage 13 configured to write data stored in the tile buffer to an external memory, and a programmable processing stage 14. The programmable processing stage 14 is operable under the control of graphics program instructions to read fragment data stored in the tile buffer 10 on a random access basis, perform a processing operation using the read fragment data, and write the result of the processing operation into the tile buffer 10 or to an external memory.
申请公布号 US9607356(B2) 申请公布日期 2017.03.28
申请号 US201313875810 申请日期 2013.05.02
申请人 ARM LIMITED 发明人 Lassen Anders;Nystad Jorn
分类号 G09G5/39;G06T11/00;G06T15/00;G06T1/60;G06T11/40 主分类号 G09G5/39
代理机构 Vierra Magen Marcus LLP 代理人 Vierra Magen Marcus LLP
主权项 1. A tile-based graphics processing pipeline comprising: a plurality of processing stages, including at least a rasteriser that rasterises input primitives to generate graphics fragments to be processed, each graphics fragment having one or more sampling points associated with it, and a renderer that processes fragments generated by the rasteriser to generate rendered fragment data; a tile buffer configured to store rendered fragment data locally to the graphics processing pipeline prior to that data being written out to an external memory, the tile buffer storing data values for an array of sample positions, with respective sets of the sample positions corresponding to and being associated with respective pixels of an output data array that the rendered fragment data relates to; write out stage circuitry configured to write data stored in the tile buffer to an external memory; and programmable processing stage circuitry operable under the control of graphics program instructions to perform a pixel processing operation for each respective pixel position of plural pixel positions that data stored in the tile buffer represents, said pixel processing operation comprising reading data stored in the tile buffer for one or more sampling positions that are not associated with the pixel position in question, performing a processing operation for said pixel position using the read sampling position data, and writing the result of the processing operation for said pixel position into the tile buffer or to an external memory for said pixel position only.
地址 Cambridge GB