Systems and methods for synchronization of clock signals

摘要

A system may include a transmitting device. The transmitting device may include one or more terminals for receiving a data signal and a first clock signal. A first phase lock loop may lock a phase of an initial periodic signal with a phase of the first clock signal, the first phase lock loop including a divider to generate the initial periodic signal based on the first clock signal. A decimation module may sample the initial periodic signal at a decimated rate of a backplane clock, the backplane clock being asynchronous with a clock that generated the first clock signal. A transmitting data block interface may construct data blocks and provide the data blocks to a receiving device, each of one or more of the data blocks including a portion of the data signal and at least one sample of the initial periodic signal.

主权项

1. A system for clock signaling, the system comprising:
a transmitting device including:
one or more terminals configured to receive a data signal and a first clock signal;a first phase lock loop configured to lock a phase of an initial periodic signal with a phase of the first clock signal, the first phase lock loop including a divider to generate the initial periodic signal based on the first clock signal;decimation circuitry configured to sample the initial periodic signal at a decimated rate of a backplane clock, the backplane clock being asynchronous with a clock that generated the first clock signal; anda transmitting data block interface configured to construct data blocks and provide the data blocks to a receiving device, each of one or more of the data blocks including a portion of the data signal and at least one sample of the initial periodic signal.