发明名称 Solid-state imaging device
摘要 A solid-state imaging device includes: a first substrate; a second substrate; a pixel unit in which pixels are disposed in a matrix; and an A/D conversion unit that is disposed for every columns of the pixels and counts a count clock for only a period according to a magnitude of the pixel signal. The A/D conversion unit includes: counter units that is provided in one of the first substrate and the second substrate and generates n-bit count signals; memory units that is provided in the other of the first substrate and the second substrate and holds the count signals and outputs the held count signals to horizontal signal transfer lines; and a connection unit that connects each counter unit to a corresponding one of the memory units and simultaneously transfer the count signals from at least two counter units to at least two memory units.
申请公布号 US9609257(B2) 申请公布日期 2017.03.28
申请号 US201514644893 申请日期 2015.03.11
申请人 OLYMPUS CORPORATION 发明人 Tanaka Takanori
分类号 H03M1/34;H04N5/378;H01L27/146;H04N5/369;H04N5/357 主分类号 H03M1/34
代理机构 Westerman, Hattori, Daniels & Adrian, LLP 代理人 Westerman, Hattori, Daniels & Adrian, LLP
主权项 1. A solid-state imaging device comprising: a first substrate; a second substrate; a pixel unit disposed in the first substrate and in which a plurality of pixels, each of which has a photoelectric conversion element and generates a pixel signal, are disposed in a matrix; and an analog-to-digital (A/D) conversion unit disposed for every one or more columns of the pixels and configured to count a count clock for only a period according to a magnitude of the pixel signal, wherein the A/D conversion unit includes: a plurality of counter units provided in one of the first substrate and the second substrate and configured to generate n-bit count signals (n is a natural number greater than or equal to 2) by counting the count clock; a plurality of memory units provided in the other of the first substrate and the second substrate and configured to hold the count signals and output the held count signals to a plurality of horizontal signal transfer lines; and a connection unit configured to connect each of the plurality of counter units to a corresponding one of the plurality of memory units and simultaneously transfer the count signals from at least two counter units to at least two memory units.
地址 Tokyo JP