High electron mobility transistor and method of manufacturing the same

摘要

According to example embodiments, a high electron mobility transistor (HEMT) includes: stack including a buffer layer, a channel layer containing a two dimensional electron gas (2DEG) channel, and a channel supply layer sequentially stacked on each other, the stack defining a first hole and a second hole that are spaced apart from each other. A first electrode, a second electrode, and third electrode are spaced apart from each other along a first surface of the channel supply layer. A first pad is on the buffer layer and extends through the first hole of the stack to the first electrode. A second pad is on the buffer layer and extends through the second hole of the stack to the second electrode. A third pad is under the stack and electrically connected to the third electrode.

主权项

1. A high electron mobility transistor (HEMT) comprising:
a channel supply layer; a channel layer on the channel supply layer,
the channel layer including a two dimensional electron gas (2DEG) channel; a source electrode, a drain electrode, and a gate electrode spaced apart from each other and supporting the channel supply layer; a source contact pad connected to the source electrode; a drain contact pad connected to the drain electrode; a gate contact pad connected to the gate electrode; and a buffer layer on the channel layer,
the buffer layer, the channel layer, and the channel supply layer defining a first via hole and a second via hole, respectively, that are spaced apart from each other and expose two of the source electrode, the drain electrode, and the gate electrode, respectively,a first one of the source contact pad, the drain contact pad, and the gate contact pad is on an upper surface of the buffer layer and fills the first via hole,a second one of the source contact pad, the drain contact pad, and the gate contact pad is on the upper surface of the buffer layer and fills the second via hole, the first via hole and the second via hole each having widths that are less than respective widths of the two of the source electrode, the drain electrode, and the gate electrode, and less than respective widths of uppermost portions of the first one and the second one of the source contact pad, the drain contact pad, and the gate contact pad, and the channel supply layer is on a third one of the source contact pad, the drain contact pad, and the gate contact pad.