| 发明名称 | Memory device and method of fabricating the same | ||
| 摘要 | A memory device including a substrate, an insulating layer on the substrate, the insulating layer including a first region having a first top surface and a second region having a second top surface, the second top surface being lower than the first top surface with respect to the substrate, the first region including a first through hole penetrating therethrough, the second region including a second through hole penetrating therethrough, a first conductive pattern filling the first through hole, a second conductive pattern at least partially filling the second through hole, a magnetic tunnel junction pattern on the first conductive pattern, and a contact plug coupled to the second conductive pattern may be provided. Further, a method of fabricating the memory device also may be provided. | ||
| 申请公布号 | US9608040(B2) | 申请公布日期 | 2017.03.28 |
| 申请号 | US201615158981 | 申请日期 | 2016.05.19 |
| 申请人 | Samsung Electronics Co., Ltd. | 发明人 | Baek Gwang-Hyun;Kim Inho;Kim Jong-Kyu;Park Jongchul;Oh Jung-Ik |
| 分类号 | H01L43/12;H01L27/22;H01L43/02;H01L43/08;H01L43/10;G11C11/16;H01L23/528 | 主分类号 | H01L43/12 |
| 代理机构 | Harness, Dickey & Pierce, P.L.C. | 代理人 | Harness, Dickey & Pierce, P.L.C. |
| 主权项 | 1. A memory device, comprising: a substrate; an insulating layer on the substrate, the insulating layer including a first region having a first top surface and a second region having a second top surface, the second top surface being lower than the first top surface with respect to the substrate, the first region including a first through hole penetrating therethrough, the second region including a second through hole penetrating therethrough; a first conductive pattern filling the first through hole; a second conductive pattern at least partially filling the second through hole; a magnetic tunnel junction pattern on the first conductive pattern; and a contact plug coupled to the second conductive pattern. | ||
| 地址 | Gyeonggi-do KR | ||