发明名称 |
DC/DC converter activation stability control |
摘要 |
Provided is a DC/DC converter capable of operating a circuit to perform stable control even when an output voltage becomes 0 V at the time of activation of a power supply voltage or due to a load short circuit. The DC/DC converter includes an ON-timer circuit including: a ripple generation circuit configured to generate and output a ripple component based on a control signal; an averaging circuit configured to output a signal obtained by averaging an output of the ripple generation circuit; a timer circuit configured to generate and output an ON-time signal based on the signal of the averaging circuit and the control signal; and an activation circuit configured to increase a voltage of an output terminal of the ripple generation circuit to a predetermined voltage. |
申请公布号 |
US9608521(B2) |
申请公布日期 |
2017.03.28 |
申请号 |
US201514643743 |
申请日期 |
2015.03.10 |
申请人 |
SII SEMICONDUCTOR CORPORATION |
发明人 |
Shiina Yoshiomi;Uno Masayuki |
分类号 |
H02M3/156;G05F1/00;H02M3/157 |
主分类号 |
H02M3/156 |
代理机构 |
Brinks Gilson & Llone |
代理人 |
Brinks Gilson & Llone |
主权项 |
1. A DC/DC converter, comprising:
a first comparator configured to output a result of comparison between a first sum voltage at inverting inputs, obtained by adding a first output voltage of a pseudo ripple component and a divided output voltage of the DC/DC converter, and a second sum voltage at non-inverting inputs, obtained by adding a second output voltage of the pseudo ripple component and a reference voltage; an ON-timer circuit configured to receive a control signal from an output port of a Reset/Set (RS) flip-flop circuit, the control signal inputs to a drive circuit which controls a gate of one or more output transistor, and the ON-timer circuit outputs an ON-time signal to a R input port of the RS flip-flop circuit, wherein a S input port of the RS flip-flop circuit receives the output result of comparison from the first comparator, wherein the output port of the RS flip-flop circuit outputs the control signal which is synchronized to both the input of the ON-timer circuit and to the drive circuit for controlling the one or more output transistor; the ON-timer circuit comprising:
a ripple generation circuit configured to generate and output a ripple component based on the control signal received at the input of the ON-timer circuit;an averaging circuit configured to output a signal obtained by averaging the outputted ripple component of the ripple generation circuit to form a predetermined voltage which is proportional to the output voltage of the DC/DC converter;a timer circuit configured to generate and output the ON-time signal based on the signal of the averaging circuit and the control signal; andan activation circuit configured to generate and output the ON-time signal based on the signal of the averaging circuit configured to generate and output the ON-time signal based on the signal of the averaging circuit and the control signal; andan activation circuit configured to increase a voltage of an output terminal of the ripple generation circuit to the predetermined voltage such that the timer circuit operates without directly using the output voltage of the DC/DC converter to achieve activation stability control in the DC/DC converter. |
地址 |
Chiba JP |