Polishing of small composite semiconductor materials

摘要

A device includes a crystalline material within an area confined by an insulator. A surface of the crystalline material has a reduced roughness. One example includes obtaining a surface with reduced roughness by using a planarization process configured with a selectivity of the crystalline material to the insulator greater than one. In a preferred embodiment, the planarization process uses a composition including abrasive spherical silica, H2O2 and water. In a preferred embodiment, the area confined by the insulator is an opening in the insulator having an aspect ratio sufficient to trap defects using an ART technique.

主权项

1. A structure comprising:
a substrate comprising a first semiconductor crystalline material; a first material having an opening to the substrate; and a second semiconductor crystalline material within the opening in the first material and directly adjoining the first semiconductor crystalline material of the substrate, the second semiconductor crystalline material being lattice-mismatched with the first semiconductor crystalline material, top surfaces of the first material and the second semiconductor crystalline material being coplanar within 50 nm.