发明名称 Package including a plurality of stacked semiconductor devices including a capacitance enhanced through via and method of manufacture
摘要 A package can include a plurality of semiconductor devices stacked in a first direction and commonly sharing at least a first reference potential and a data signal; each semiconductor device including a first through via electrically connected to receive the first reference potential and a second through via electrically connected to receive the data signal, each first through via provides an electrical connection in the first direction between a first side and a second side opposite the first side of one of the plurality of semiconductor devices. A total first through via capacitance value is substantially greater than the total second through via capacitance value.
申请公布号 US9607969(B1) 申请公布日期 2017.03.28
申请号 US201615357829 申请日期 2016.11.21
申请人 Walker Darryl G. 发明人 Walker Darryl G.
分类号 G11C16/04;H01L25/065;H01L23/48;G11C11/4094;G11C11/4074;G11C11/4093;H01L21/768;G11C11/4099 主分类号 G11C16/04
代理机构 代理人
主权项 1. A package, comprising: a plurality of semiconductor devices stacked in a first direction and commonly sharing at least a first reference potential and a data signal; each one of the plurality of semiconductor devices including a first through via electrically connected to receive the first reference potential and a second through via electrically connected to receive the data signal, each first through via provides an electrical connection in the first direction between a first side and a second side opposite the first side of one of the plurality of semiconductor devices; each first through via on each one of the plurality of semiconductor devices has a total first through via capacitance value and each second through via on each one of the plurality of semiconductor devices has a total second through via capacitance value; wherein the total first through via capacitance value is substantially greater than the total second through via capacitance value.
地址 San Jose CA US