发明名称 |
P-N BIMODAL TRANSISTORS |
摘要 |
RESURF-based dual-gate p-n bimodal conduction laterally diffused metal oxide semiconductors (LDMOS). In an illustrative embodiment, a p-type source is electrically coupled to an n-type drain. A p-type drain is electrically coupled to an n-type source. An n-type layer serves as an n-type conduction channel between the n-type drain and the n-type source. A p-type top layer is disposed at the surface of the substrate of said semiconductor device and is disposed above and adjacent to the n-type layer. The p-type top layer serves as a p-type conduction channel between the p-type source and the p-type drain. An n-gate controls current flow in the n-type conduction channel, and a p-gate controls current flow in the p-type conduction channel. |
申请公布号 |
US2017084738(A1) |
申请公布日期 |
2017.03.23 |
申请号 |
US201615364971 |
申请日期 |
2016.11.30 |
申请人 |
Texas Instruments Incorporated |
发明人 |
Zhang Yongxi;Pendharkar Sameer P.;Edwards Henry Litzmann |
分类号 |
H01L29/78;H01L29/10;H01L29/423;H01L29/06 |
主分类号 |
H01L29/78 |
代理机构 |
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代理人 |
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主权项 |
1. A transistor, comprising:
a doped layer having a first conductivity type; a buried layer in the doped layer, the buried layer having a second conductivity type opposite the first conductivity type; a first terminal region having a first n-doped region and a first p-doped region adjacent to the first n-doped region; a second terminal region having a second n-doped region and a second p-doped region adjacent to the second n-doped region; a surface doped region having the second conductivity type and positioned between the first and second terminal regions; a first gate positioned above and between the first p-doped region and the surface doped region; and a second gate positioned above and between the surface doped region and the second n-doped region. |
地址 |
Dallas TX US |