| 发明名称 |
SEMICONDUCTOR PACKAGE |
| 摘要 |
A semiconductor package includes a semiconductor substrate and an electrode pad formed on the semiconductor substrate. The electrode pad includes a central portion and a peripheral portion, and a first pattern is located on the peripheral portion. A passivation layer is formed on the semiconductor substrate and the electrode pad. The passivation layer has an opening exposing the central portion of the electrode pad and a second pattern located on the first pattern. A seed layer is formed on the electrode pad and the passivation layer. The seed layer has a third pattern formed on the second pattern. A bump is formed on the seed layer and electrically connected to the electrode pad. An undercut is formed around the third pattern located under an edge of a lower portion of the bump. |
| 申请公布号 |
US2017084558(A1) |
申请公布日期 |
2017.03.23 |
| 申请号 |
US201615226231 |
申请日期 |
2016.08.02 |
| 申请人 |
Samsung Electronics Co., Ltd. |
发明人 |
Seo Sun-kyoung;Cho Tae-je;Kwon Yong-hwan;Baek Hyung-gil;Chung Hyun-soo;Ryu Seung-kwan;Park Myeong-soon |
| 分类号 |
H01L23/00;H01L23/29;H01L23/31 |
主分类号 |
H01L23/00 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A semiconductor package comprising:
a semiconductor substrate; an electrode pad on the semiconductor substrate and including a central portion and a peripheral portion, wherein a first pattern is located on the peripheral portion; a passivation layer on the semiconductor substrate and the electrode pad, the passivation layer having an opening exposing the central portion of the electrode pad and a second pattern located on the first pattern; a seed layer on the electrode pad and the passivation layer and having a third pattern on the second pattern; and a bump on the seed layer and electrically connected to the electrode pad, wherein an undercut is formed in the third pattern located under an edge of a lower portion of the bump. |
| 地址 |
Suwon-si KR |
