发明名称 |
HYBRID PHASE LOCKED LOOP HAVING WIDE LOCKING RANGE |
摘要 |
A digital phased lock loop includes a digital controlled oscillator configured to produce an output signal at an output signal frequency, and a phase comparator configured to compare the output signal or a signal derived from the output signal, with a reference signal at a reference signal frequency or a signal derived from the reference signal to produce a phase error signal. A first loop filter produces a first control signal for the digital controlled oscillator. A frequency error measuring circuit produces a frequency error signal that directly represents a frequency difference between the output signal frequency and the reference signal frequency. A second loop filter produces a second control signal for the digital controlled oscillator from an output of the frequency error measuring circuit. A circuit combines the first and second control signals and providing the combined control signals to the digital controlled oscillator. |
申请公布号 |
US2017085273(A1) |
申请公布日期 |
2017.03.23 |
申请号 |
US201615364167 |
申请日期 |
2016.11.29 |
申请人 |
Microsemi SoC Corporation |
发明人 |
Reddy Prakash |
分类号 |
H03L7/10;H03L7/093;H03L7/099 |
主分类号 |
H03L7/10 |
代理机构 |
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代理人 |
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主权项 |
1. A digital phased lock loop comprising:
a digital controlled oscillator configured to produce an output signal at an output signal frequency; a phase comparator configured to compare the output signal or a signal derived from the output signal, with a reference signal at a reference signal frequency or a signal derived from the reference signal to produce a phase error signal; a first loop filter configured to produce a first control signal for the digital controlled oscillator from an output of the phase comparator; a frequency error measuring circuit coupled to the output of the phase comparator and configured to produce a frequency error signal that directly represents a frequency difference between the output signal frequency and the reference signal frequency; a second loop filter configured to produce a second control signal for the digital controlled oscillator from an output of the frequency error measuring circuit; and a circuit for combining the first and second control signals and providing the combined control signals to the digital controlled oscillator. |
地址 |
San Jose CA US |