发明名称 SINGLE ENDED BITLINE CURRENT SENSE AMPLIFIER FOR SRAM APPLICATIONS
摘要 Single ended bitline current sense amplifier for SRAM applications. The present disclosure relates to current sense read amplifier for use as a read amplifier in a memory arrangement of memory cell groups, wherein in each of the memory cell groups cells includes at least one read port connected to a read amplifier by a bitline, and wherein said read amplifiers are connected to a data output. The current sense read amplifier includes a voltage regulator to keep a bitline voltage at a constant voltage level below a power supply voltage and above a ground, a measurement circuit to detect a high current value and a low current value in an input signal, and a generator to generate a high voltage level output signal when the high current value input is detected and to generate a low voltage level output signal when the low current level value is detected.
申请公布号 WO2017046671(A1) 申请公布日期 2017.03.23
申请号 WO2016IB55219 申请日期 2016.09.01
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION;IBM (CHINA) INVESTMENT COMPANY LTD.;IBM DEUTSCHLAND GMBH 发明人 FRITSCH, Alexander;KALYANASUNDARAM, Shankar;KUGEL, Michael B.;PILLE, Juergen
分类号 G11C7/02 主分类号 G11C7/02
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