发明名称 |
SEMICONDUCTOR PACKAGE ASSEMBLIES WITH SYSTEM-ON-CHIP (SOC) PACKAGES |
摘要 |
A semiconductor package assembly includes a first semiconductor package. The first semiconductor package has a semiconductor die having pads thereon, first vias disposed on the first semiconductor die, the first vias coupled to the pads. A second semiconductor package is stacked on the first semiconductor package and includes a body having a die-attach surface and a bump-attach surface opposite to the die-attach surface, a first memory die mounted on the bump-attach surface, coupled to the body, and a second memory die mounted on the die-attach surface, coupled to the body through the bonding wires. The number of input/output (I/O) pins of first memory die is different from the number of input/output (I/O) pins of the second memory die. |
申请公布号 |
US2017084583(A1) |
申请公布日期 |
2017.03.23 |
申请号 |
US201615365217 |
申请日期 |
2016.11.30 |
申请人 |
MediaTek Inc. |
发明人 |
LIN Tzu-Hung;YANG Ming-Tzong |
分类号 |
H01L25/065;H01L25/10 |
主分类号 |
H01L25/065 |
代理机构 |
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代理人 |
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主权项 |
1. A semiconductor package assembly, comprising:
a first semiconductor package, comprising: a semiconductor die having pads thereon; first vias disposed on the first semiconductor die, coupled to the pads; and a second semiconductor package stacked on the first semiconductor package, comprising: a body having a die-attach surface and a bump-attach surface opposite to the die-attach surface; a first memory die mounted on the bump-attach surface, coupled to the body; and a second memory die mounted on the die-attach surface, coupled to the body through the bonding wires, wherein a number of input/output (I/O) pins of first memory die is different from a number of input/output (I/O) pins of the second memory die. |
地址 |
Hsin-Chu TW |