| 摘要 |
Methods, techniques, and structures relating to die packaging. In one exemplary implementation, a die package interconnect structure includes a semiconductor substrate and a first conducting layer in contact with the semiconductor substrate. The first conducting layer may include a base layer metal. The base layer metal may include Cu. The exemplary implementation may also include a diffusion barrier in contact with the first conducting layer and a wetting layer on top of the diffusion barrier. A bump layer may reside on top of the wetting layer, in which the bump layer may include Sn, and Sn may be electroplated. The diffusion barrier may be electroless and may be adapted to prevent Cu and Sn from diffusing through the diffusion barrier. Furthermore, the diffusion barrier may be further adapted to suppress a whisker-type formation in the bump layer. |
| 主权项 |
1. A method of forming an assembly, comprising:
providing a die, the die having a metal pad including aluminum, a base layer metal (BLM) disposed on the metal pad, the BLM including titanium, a bump disposed on the BLM, the bump including copper, and a first solder layer disposed on the bump, the first solder layer including tin; providing a package, the package having a first side and an opposing second side, and a second solder layer disposed on the first side of the package, the second solder layer including tin; connecting the second solder layer of the package to the first solder layer of the die to enable electrical current to flow between the package and the die. |
