发明名称 |
WRITE NULLIFICATION |
摘要 |
Apparatus and methods are disclosed for nullifying one or more registers identified in a target field of a nullification instruction. In some examples of the disclosed technology, an apparatus can include memory and one or more block-based processor cores configured to fetch and execute a plurality of instruction blocks. One of the cores can include a control unit configured, based at least in part on receiving a nullification instruction, to obtain a register identification of at least one of a plurality of registers, based on a target field of the nullification instruction. A write to the at least one register associated with the register identification is nullified. The nullification instruction is in a first instruction block of the plurality of instruction blocks. Based on the nullified write to the at least one register, a subsequent instruction is executed from a second, different instruction block. |
申请公布号 |
US2017083329(A1) |
申请公布日期 |
2017.03.23 |
申请号 |
US201615060413 |
申请日期 |
2016.03.03 |
申请人 |
Microsoft Technology Licensing, LLC |
发明人 |
Burger Douglas C.;Smith Aaron L. |
分类号 |
G06F9/30;G06F9/38 |
主分类号 |
G06F9/30 |
代理机构 |
|
代理人 |
|
主权项 |
1. An apparatus comprising a block-based processor, the block-based processor comprising:
one or more processing cores configured to fetch and execute a plurality of instruction blocks; and a control unit configured, based at least in part on receiving a nullification instruction, to:
obtain a register identification of at least one of a plurality of registers, based on a target field of the nullification instruction;nullify a write to the at least one register associated with the register identification, wherein the nullification instruction is in a first instruction block of the plurality of instruction blocks; andbased on the nullified write to the at least one register, execute a subsequent instruction from a second, different instruction block of the plurality of instruction blocks. |
地址 |
Redmond WA US |