SEMICONDUCTOR PACKAGE DEVICE

摘要

A semiconductor package may include a first chip located over a substrate. The semiconductor package may include a second chip located over the substrate and adjacent to the first chip. The semiconductor package may include a test micro-bump located at a layer below the first chip and above the substrate, and electrically coupled to an external connection member through a first path. The semiconductor package may include a normal micro-bump located at a layer below the first chip and above the substrate, and electrically coupled to the second chip through a second path.

主权项

1. A semiconductor package device comprising:
a first chip located over a substrate; a second chip located over the substrate and adjacent to the first chip on the same layer as in the first chip; a test micro-bump located at a layer below the first chip and above the substrate, and electrically coupled to an external connection member through a first path; a normal micro-bump located at a layer below the first chip and above the substrate, and electrically coupled to the second chip through a second path; and a molding member molded into a predetermined region of an outer wall of the first chip, and formed over the test micro-bump and the normal micro-bump.