MEMORY DEVICE WITH SHORTENED PRE-CHARGING TIME FOR BIT-LINE

摘要

The present disclosure may provide a memory device including a page buffer and bit-lines coupled thereto with a less load of the bit-lines. In one aspect of the present disclosure, there is provided a memory device comprising: bit-lines, each bit-line having opposite first and second ends; plugs coupled respectively to the bit-lines, each plug disposed between and excluding the first and second ends; and a page buffer coupled to the plugs.

主权项

1. A memory device comprising:
a plurality of bit-lines, each bit-line having opposite first and second ends and extending in a first direction to have a predetermined length; a page buffer; and a plurality of plugs, each of the plurality of plugs coupling each of the plurality bit-lines to the page buffer, each plug being disposed between and excluding the first and second ends, wherein each of the plugs is disposed at a central portion of an entire length of each of the bit-lines between the first and second ends of each of the bit-lines.