发明名称 BLOCK-BASED PROCESSOR CORE TOPOLOGY REGISTER
摘要 Systems, apparatuses, and methods related to a block-based processor core topology register are disclosed. In one example of the disclosed technology, a processor can include a plurality of block-based processor cores for executing a program including a plurality of instruction blocks. A respective block-based processor core can include a sharable resource and a programmable composition topology register. The programmable composition topology register can be used to assign a group of the physical processor cores that share the sharable resource.
申请公布号 US2017083334(A1) 申请公布日期 2017.03.23
申请号 US201514998146 申请日期 2015.12.23
申请人 Microsoft Technology Licensing, LLC 发明人 Burger Douglas C.;Smith Aaron L.
分类号 G06F9/30;G06F9/35;G06F9/38 主分类号 G06F9/30
代理机构 代理人
主权项 1. A processor comprising a plurality of block-based physical processor cores for executing a program comprising a plurality of instruction blocks, a respective block-based physical processor core comprising: a branch predictor configured to select an instruction block of the plurality of instruction blocks to be speculatively executed by a logical processor; and a programmable composition topology register for assigning a number of physical processor cores of the plurality of block-based physical processor cores to the logical processor, the programmable composition topology register dynamically programmable during execution of the program.
地址 Redmond WA US