| 发明名称 |
INITIATING INSTRUCTION BLOCK EXECUTION USING A REGISTER ACCESS INSTRUCTION |
| 摘要 |
Apparatus and methods are disclosed for initiating instruction block execution using a register access instruction (e.g., a register Read instruction). In some examples of the disclosed technology, a block-based computing system can include a plurality of processor cores configured to execute at least one instruction block. The at least one instruction block encodes a data-flow instruction set architecture (ISA). The ISA includes a first plurality of instructions and a second plurality of instructions. One or more of the first plurality of instructions specify at least a first target instruction without specifying a data source operand. One or more of the second plurality of instructions specify at least a second target instruction and a data source operand that specifies a register. |
| 申请公布号 |
US2017083314(A1) |
申请公布日期 |
2017.03.23 |
| 申请号 |
US201615044040 |
申请日期 |
2016.02.15 |
| 申请人 |
Microsoft Technology Licensing, LLC |
发明人 |
Burger Douglas C.;Smith Aaron L. |
| 分类号 |
G06F9/30;G06F15/80;G06F9/38 |
主分类号 |
G06F9/30 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A block-based computing system, comprising:
a plurality of processor cores configured to execute at least one instruction block, the at least one instruction block encoding a data-flow instruction set architecture (ISA), wherein the data-flow ISA comprises:
a first plurality of instructions, wherein one or more of the first plurality of instructions specify at least a first target instruction without specifying a data source operand; anda second plurality of instructions, wherein one or more of the second plurality of instructions specify at least a second target instruction and a data source operand that specifies a register. |
| 地址 |
Redmond WA US |
