发明名称 |
Mapping Graphics Resources to Linear Arrays Using a Paging System |
摘要 |
Memory resources that are stored in GPU-specific formats may be accessed as linear arrays by CPU applications. Shared virtual memory (SVM) support enables closer CPU/GPU interaction. This creates a need to efficiently access graphics data using SVM. CPU page mapping and memory management hardware may perform the address/data swizzling and tiled rendering translations required for GPU memory formats. As a result, CPU applications can access GPU resources as if they are stored in a linear array, while also using shared virtual memory. |
申请公布号 |
US2017084000(A1) |
申请公布日期 |
2017.03.23 |
申请号 |
US201514862634 |
申请日期 |
2015.09.23 |
申请人 |
Intel Corporation |
发明人 |
Seiler Larry |
分类号 |
G06T1/60 |
主分类号 |
G06T1/60 |
代理机构 |
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代理人 |
|
主权项 |
1. A method comprising:
accessing memory resources stored in graphics processor using an application running on a central processing unit; and performing swizzling translations of the graphics processor-specific formats on said central processing unit. |
地址 |
Santa Clara CA US |