发明名称 SEMICONDUCTOR DEVICE, METHOD OF FABRICATING THE SAME, AND PATTERNING METHOD
摘要 A method of fabricating a semiconductor device includes forming first and second active patterns on first and second regions, respectively, of a substrate, forming first and second gate structures on the first and second active patterns, respectively, forming a coating layer to cover the first and second gate structures and the first and second active patterns, and forming a first recess region in the first active pattern between the first gate structures and a second recess region in the second active pattern between the second gate structures.
申请公布号 US2017084493(A1) 申请公布日期 2017.03.23
申请号 US201615260952 申请日期 2016.09.09
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 HAN DONGWOO;YANG KWANG-YONG;LEE JINWOOK;JEON KYUNGYUB;JUNG HAEGEON;KIM DOHYOUNG
分类号 H01L21/8234;H01L27/088;H01L21/306;H01L29/66 主分类号 H01L21/8234
代理机构 代理人
主权项 1. A method of fabricating a semiconductor device, comprising: providing a substrate having a first region and a second region; forming first and second active patterns at the first and second regions, respectively, of the substrate; forming first gate structures across the first active pattern as spaced apart from each other by a first distance along the first active pattern, and forming second gate structures across the second active pattern as spaced apart from each other by a second distance along the second active pattern; forming a coating layer to cover the first and second gate structures and the first and second active patterns; performing a recess process to form a first recess in the first active pattern between the first gate structures and a second recess in the second active pattern between the second gate structures; and forming a source/drain epitaxial layer in the first and second recesses, wherein the coating layer is formed to a first thickness on a region of the first active pattern between the first gate structures and to a second thickness different from the first thickness on a region of the second active pattern between the second gate structures.
地址 Suwon-Si KR
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