发明名称 半導体記憶装置
摘要 According to one embodiment, a semiconductor memory device includes: first to third pages; first to third word line; and row decoder. In data writing, data is written into the first page before data is written into the second page. The row decoder is configured to apply first to third verify voltages to the gates of the first to third memory cells in a program verify operation.
申请公布号 JP6100401(B2) 申请公布日期 2017.03.22
申请号 JP20150553271 申请日期 2013.12.18
申请人 株式会社東芝 发明人 阿部 健一;白川 政信;吉田 みづほ;二山 拓也
分类号 G11C16/02;G11C16/04;G11C16/06 主分类号 G11C16/02
代理机构 代理人
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