| 摘要 |
A manufacturing method for a high resolution AMOLED backplane. The method comprises: step 10, forming a first buffer layer (201) on a substrate (200); step 20, forming a low temperature polycrystalline silicon layer (210) on the first buffer layer (201); step 30, patterning the low temperature polycrystalline silicon layer (210); step 40, forming a gate insulation layer (211), arranging a suitable photoresist mask (212) on the gate insulation layer (211) corresponding to a TFT source/drain electrode region (22, 23) and a storage capacitance region (21), and performing first P+ ion doping on the patterned low temperature polycrystalline silicon layer (210); step 50, forming a gate electrode (220), and performing second P+ ion doping on the patterned low temperature polycrystalline silicon layer (210) by using the gate electrode (220) as a hard mask; and step 60, forming a first insulation layer (221) on the gate electrode (220), and forming a source/drain electrode (230) on the first insulation layer (221), wherein the source/drain electrode (230) is connected via a contact window to a portion of the TFT source/drain electrode region (22, 23) on which the first P+ ion doping and the second P+ ion doping are both performed. The manufacturing method for a high resolution AMOLED backplane improves design rules, increases the resolution of the panel, and reduces the contact resistance of a source/drain electrode and a P+ doping region. |
