Bit interleaver for low-density parity check codeword having length of 64800 and code rate of 2/15 and 64-symbol mapping, and bit interleaving method using same

摘要

A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 2/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 64-symbol mapping.

主权项

1. A bit group-unit interleaver, comprising:
a first memory configured to store a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 2/15; a processor configured to generate an interleaved codeword by interleaving the LDPC codeword on a bit group basis, the size of the bit group corresponding to a parallel factor of the LDPC codeword; and a second memory configured to store the interleaved codeword corresponding to a modulator for 64-symbol mapping, wherein the 64-symbol mapping is a Non-Uniform Constellation (NUC) symbol mapping which corresponds to 64 constellations, wherein the interleaving is performed using the following equation using permutation order:
Yj=Xπ(j) 0≦j