发明名称 Secure boot using a field programmable gate array (FPGA)
摘要 This disclosure describes techniques for ensuring security in an integrated circuit system that includes a processor subsystem and a configurable-logic (e.g., FPGA) subsystem, which is capable of storing code executed by the processor. Techniques for utilizing the configurable-logic to control the process of booting a processor in the processor subsystem securely are described. Because the configurable-logic may be on the same die as the processor in the integrated circuit, the configurable-logic may securely boot the processor inside the security boundary of the package containing the die.
申请公布号 US9600291(B1) 申请公布日期 2017.03.21
申请号 US201414201016 申请日期 2014.03.07
申请人 Altera Corporation 发明人 Atsatt Sean R.
分类号 G06F21/00;G06F12/14;G06F9/44;G06F21/62;G06F21/57;H04L9/00 主分类号 G06F21/00
代理机构 Fletcher Yoder, P.C. 代理人 Fletcher Yoder, P.C.
主权项 1. An integrated circuit comprising: a hard processor subsystem comprising: processor circuitry comprising a processor; anda boot read only memory (ROM); a field programmable gate array (FPGA) subsystem comprising: FPGA circuitry comprising a FPGA core and a FPGA memory; and an interface coupled to the hard processor subsystem and the FPGA subsystem, wherein the interface is configured to transmit data and control signals between the hard processor subsystem and the FPGA subsystem; wherein the processor of the hard processor subsystem is configured to: execute a first set of boot instructions stored in the boot ROM of the hard processor subsystem to boot the processor; andread, via the interface, a second set of boot instructions from a program object file (POF) stored in the FPGA memory to boot the processor and execute the second set of boot instructions after the FPGA core has authenticated the POF and after the first set of boot instructions has been executed.
地址 San Jose CA US