发明名称 |
Gate-all-around semiconductor device and method of fabricating the same |
摘要 |
The disclosed technology generally relates to semiconductor devices and more particularly to a gate-all-around semiconductor device, and methods of fabricating the same. In one aspect, the method comprises providing on a semiconductor substrate between STI regions at least one suspended nanostructure anchored by a source region and a drain region. The suspended nanostructure is formed of a crystalline semiconductor material that is different from a crystalline semiconductor material of the semiconductor substrate. A gate stack surrounds the at least one suspended nanostructure. |
申请公布号 |
US9601488(B2) |
申请公布日期 |
2017.03.21 |
申请号 |
US201615138056 |
申请日期 |
2016.04.25 |
申请人 |
IMEC VZW |
发明人 |
Waldron Niamh;Merckling Clement;Collaert Nadine |
分类号 |
H01L29/41;H01L27/088;B82Y10/00;B82Y40/00;H01L29/66;H01L29/775;H01L29/06;H01L29/10;H01L29/20;H01L29/04;H01L29/423;H01L29/78;H01L29/40;H01L21/02 |
主分类号 |
H01L29/41 |
代理机构 |
Knobbe, Martens, Olson & Bear LLP |
代理人 |
Knobbe, Martens, Olson & Bear LLP |
主权项 |
1. A semiconductor device comprising:
a semiconductor substrate comprising a crystalline semiconductor material; at least one suspended nanostructure extending in a first direction and formed at least partially above and between a pair of adjacent STI regions, the at least one suspended nanostructure being electrically connected to and mechanically supported by a source region and a drain region formed at opposite ends of the at least one suspended nanostructure in the first direction, wherein the at least one suspended nanostructure comprises a crystalline semiconductor material that is different from the crystalline semiconductor material of the semiconductor substrate; a cavity formed vertically between the at least one suspended nanostructure and the semiconductor substrate and laterally between sidewalls of the STI regions facing each other; and a gate stack surrounding the suspended nanostructure, wherein the gate stack extends to cover a top surface and the sidewalls of the STI regions and an exposed surface of the semiconductor substrate in the cavity. |
地址 |
Leuven BE |