Fast frequency throttling and re-locking technique for phase-locked loops

摘要

Certain aspects of the present disclosure support a method and apparatus for fast frequency throttling and re-locking in a phase-locked loop (PLL) device. Aspects of the present disclosure present a method and apparatus for operating in an open loop control (OLC) mode of the PLL device for generating a periodic signal. During the OLC mode, clocking of circuitry interfaced with a digitally-controlled oscillator (DCO) of the PLL device can be disabled. A PLL output frequency associated with the periodic signal generated by the DCO can be controlled directly through a digital control word input into the DCO.

主权项

1. A method for operating a phase-locked loop (PLL) device for generating a periodic signal, comprising:
locking, in a first operating mode of the PLL device, a PLL output frequency associated with the periodic signal to a target value; switching operation of the PLL device from the first operating mode to a second operating mode, such that a state of the PLL device in the first operating mode is preserved; disabling, during the second operating mode, operation of circuitry interfaced with a digitally-controlled oscillator (DCO) of the PLL device; controlling, during the second operating mode, the PLL output frequency associated with the periodic signal generated by the DCO directly through a digital control word input into the DCO; and switching operation of the PLL device from the second operating mode back to the first operating mode, wherein the preserved state of the PLL device is restored and the PLL output frequency is locked to the target value, wherein switching operation of the PLL device from the second operating mode back to the first operating mode comprises:
setting the digital control word to a value it had prior to the PLL device switching operation from the first operating mode to the second operating mode.